waveform_acquisition_FPGA_code/puart2/intan_m10.archive.rpt

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Archive Project report for intan_m10
Sat Sep 21 09:52:33 2024
Quartus Prime Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
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; Table of Contents ;
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1. Legal Notice
2. Archive Project Summary
3. Archive Project Messages
4. Files Archived
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; Legal Notice ;
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Copyright (C) 2017 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
refer to the applicable agreement for further details.
+----------------------------------------------------------------+
; Archive Project Summary ;
+------------------------+---------------------------------------+
; Archive Project Status ; Successful - Sat Sep 21 09:52:33 2024 ;
; Revision Name ; intan_m10 ;
; Top-level Entity Name ; ddr_ctrl ;
; Family ; MAX 10 ;
+------------------------+---------------------------------------+
+--------------------------+
; Archive Project Messages ;
+--------------------------+
Info: File Set 'Source control' contains:
Info: Project source and settings files
Info: Automatically detected source files
Warning: Hierarchical Platform Designer systems and custom IP components(_hw.tcl and associated files) are not archived by the Quartus Archiver
Critical Warning: Analysis & Elaboration was not run successfully.
Critical Warning: The 'Automatically detected source files' file subset will attempt to guess which files are needed. The archive file will likely be larger than required and may still be incomplete.
Warning (225003): Can't find required hierarchy file 20240625.v
Info: Parsing: spi_master_2164.v
Info: Parsing: ddr_ctrl.v
Info: Parsing: clk_gen.v
Info: Parsing: clk_gen_inst.v
Info: Parsing: clk_gen_bb.v
Info: Parsing: spi_master_esp32.v
Info: Parsing: intan_m10.v
Info: Archive will store files relative to the closest common parent directory
Info (13213): Using common directory E:/FPGA/SPItransfer/20240726/
Info: ----------------------------------------------------------
Info: ----------------------------------------------------------
Info: Generated archive 'E:/FPGA/SPItransfer/20240726/uart_tx.qar'
Info: ----------------------------------------------------------
Info: ----------------------------------------------------------
Info: Generated report 'intan_m10.archive.rpt'
Error (23031): Evaluation of Tcl script e:/quartuslite/quartus/common/tcl/apps/qpm/qar.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 6 errors, 17 warnings
Error: Peak virtual memory: 4826 megabytes
Error: Processing ended: Sat Sep 21 09:52:33 2024
Error: Elapsed time: 00:00:10
Error: Total CPU time (on all processors): 00:00:20
+------------------------------------------------------+
; Files Archived ;
+------------------------------------------------------+
; File Name ;
+------------------------------------------------------+
; clk_gen.ppf ;
; clk_gen.qip ;
; clk_gen.v ;
; clk_gen_bb.v ;
; clk_gen_inst.v ;
; clkgen.ppf ;
; clkgen.qip ;
; clkgen.v ;
; clkgen_bb.v ;
; clkgen_inst.v ;
; ddr_ctrl.v ;
; ddr_ctrl_tb.v ;
; e:/quartuslite/quartus/bin64/assignment_defaults.qdf ;
; intan_m10.qpf ;
; intan_m10.qsf ;
; intan_m10.v ;
; intan_m10_assignment_defaults.qdf ;
; output_files/intan_m10.asm.rpt ;
; output_files/intan_m10.cdf ;
; output_files/intan_m10.done ;
; output_files/intan_m10.eda.rpt ;
; output_files/intan_m10.fit.rpt ;
; output_files/intan_m10.fit.smsg ;
; output_files/intan_m10.fit.summary ;
; output_files/intan_m10.flow.rpt ;
; output_files/intan_m10.jdi ;
; output_files/intan_m10.map.rpt ;
; output_files/intan_m10.map.smsg ;
; output_files/intan_m10.map.summary ;
; output_files/intan_m10.pin ;
; output_files/intan_m10.pof ;
; output_files/intan_m10.pow.rpt ;
; output_files/intan_m10.pow.summary ;
; output_files/intan_m10.sld ;
; output_files/intan_m10.sof ;
; output_files/intan_m10.sta.rpt ;
; output_files/intan_m10.sta.summary ;
; spi_master_2164.v ;
; spi_master_esp32.v ;
+------------------------------------------------------+